The invention relates to host signal processing communications and, more particularly, to a data communication device configured to enable the processing of real-time signals in a non-real-time environment while maintaining quality and integrity throughout the signal transmission.
Conventional computer systems transmit data using modems connected to telephone lines or other communication media. These modems typically include an analog to digital converter and a digital to analog converter, (A/D-D/A converter) typically combined into a single device called a CODEC. This CODEC converts incoming analog signals to digital signals that can be processed by a signal processing unit and converts digital signals from a signal processing unit to outgoing analog signals that can be transmitted on a communication medium such as a telephone line. The signal processing unit, sometimes referred to as a “datapump,” is conventionally a dedicated chip known as a Digital Signal Processor (DSP), which is preprogrammed with algorithms for converting the digital signals into information bits.
The modem may also include a second dedicated chip, sometimes called the “controller,” which is a microcontroller preprogrammed to control the DSP and convert the information bits into data usable by the computer system. The controller may implement certain schemes to correct errors in the information bits, and may also implement certain schemes to compress the information bits for more efficient transmission. Some modems eliminate the dedicated controller chip by performing the control functions on the host computer system. These modems are commonly referred to as “controllerless modems.”
Conventional modems may also include buffers to temporarily store information bits or data, since the computer system may not able to respond immediately when data is available. More recently, Host Signal Processors (HSPs) have reduced the conventional modem hardware to a buffer circuit and a CODEC that are controlled by the HSP. Now HSP processes running on the computer system perform the signal processing and the control functions of the modem, eliminating the need for either a dedicated DSP chip or a dedicated microcontroller chip. Since the HSP processes are running in a non-real-time environment, they are not able to respond at the sampling rate of the CODEC, a real-time device. Therefore a dedicated circuit is needed to buffer the samples, allowing the HSP to transfer samples less frequently. The modern modem now consists of a HSP, control and signal processing software, a CODEC, and a dedicated circuit for buffering samples and interfacing the computer system hardware to the CODEC. The biggest challenge for these modem systems is to maintain the integrity of the incoming and outgoing data and consistency of the data transmission between the real-time data transmission system and the non-real-time data processing system. Data being transferred between the real-time part of the system and the non-real time part of the system of an HSP modem application consists of samples of an analog waveform that represent signals being transmitted and received on the communications medium. During modem communications, the CODEC outputs a constant flow of receive samples, and requires as input a constant flow of transmit samples. The HSP is powerful enough to process all the samples, but does not operate in real-time, so cannot process them at a consistent rate. Hence, the buffer system serves to maintain a constant flow of data between the host processor and the CODEC.
In a communication system where two or more entities transmit information on the same medium, a protocol must be established to separate the signals in order to avoid contention. One such protocol is time division multiplexing (TDM), where each entity takes turns transmitting on the medium. Another protocol is frequency division multiplexing (FDM), where each side uses a different frequency band of the common medium. Modern modems use echo cancellation, where both entities use the same medium and separate the signals traveling in opposite directions by subtracting the echo of the transmit signal from the receive signal. The echo is caused by the impedance mismatches in the network and its characteristics remain relatively constant throughout a transmission. For echo cancellation to work, an HSP must receive a consistent delay between the transmit signal and the received echo, so that the echo can be consistently subtracted from the received signal. If the delay ever changes, due to a poorly designed buffer scheme for example, the echo cancellation scheme will not be able to track the transmit echo properly, and data will be lost. Where digital signal processors (DSP's) once performed the echo cancellation, now the HSPs perform that function using the buffer system as a conduit.
Modem modulation schemes are typically defined in terms of analog signals. Most modulation schemes operate by altering the characteristics of a sine wave, the frequency of which is referred to as the carrier frequency. For example, Quadrature Amplitude Modulation (QAM) operates by altering the amplitude and phase of a carrier frequency at a fixed rate. This fixed rate is known as the baud frequency or symbol frequency. Since most modern modems use digital signal processing techniques, these analog signals must be converted to digital form using a sampling rate which is often a multiple of the baud frequency. Thus, an integer number of samples can be thought of as representing a “baud” or “symbol.” Depending on the modulation scheme and the sophistication of the algorithms it uses, the symbols, either individually or in groups, represent a certain number of information bits. The average number of information bits transmitted per second is commonly called the “data rate” or “bit rate.”
Standard protocols for modem modulation schemes have been developed to improve compatibility in the telecommunications industry. The International Telecommunications Union (ITU), formerly the International Telegraph and Telephone Consultative Committee (CCITT), for example, has developed standard recommendations that evolve with the changing technology in the modem industry. Earlier recommendations such as V.21, V.22 and V.23 use FDM for duplex communication. Newer recommendations such as V.32bis, V.34 and V.90 use echo cancellation for duplex communication. Other recommendations describe half-duplex modulation schemes for facsimile applications. Examples of these are V.27, V.29, and V.17.In employing any of these standards, it is important that a modem maintain a constant communication link with the data transmission system in order to maintain the integrity of the data transmission to be compliant.
One conventional HSP modem relies on a buffer solution that partitions a circular transmission buffer into frames based on the number of samples needed to represent an integral number of symbol periods and an integral number of carrier periods. In the conventional device, samples representing groups of symbols are transferred into a buffer. Such a modem is described and illustrated in U.S. Pat. No. 5,721,830,of Yeh, et al., assigned to PC-Tel, Inc. (the “'830 patent”). In this HSP modem, each buffer is partitioned into sections equal to the size of the individual groups of samples to be transmitted and received. Frame by frame, the samples are transferred in and out of the separate buffers to the host processor using a communications bus, such as Industry Standard Architecture (ISA) or Peripheral Component Interface (PCI). This bus is shared with other peripherals in the host computer system.
In operation of this prior art system, the CODEC continuously writes samples into the receive buffer and reads samples from the transmit buffer in a circular fashion. When one receive frame is full, the HSP must process it while the other frame is being filled by the CODEC. Similarly, while one frame is being transmitted, the other frame must be loaded with new samples by the HSP. In the event that the HSP is unable to process a frame, an overflow condition occurs. In this case, an entire frame of receive samples is lost, and is overwritten by the CODEC. Also, instead of sending new transmit samples, an old frame of samples is sent. In order to compensate for this condition, extensive circuitry is needed in the interface to account for the number of frames of samples lost. Also, extensive logic is needed in the HSP to account for lost samples in the echo cancellation process, which must be implemented so that the echo cancellation scheme can have consistent delay. As discussed above, in order for the echo cancellation to work, the echo received by the HSP must have consistent delay so that its value can be uniformly subtracted, giving the HSP the correct receive signal.
The operation of such a modem is further complicated by the implementation of the V.34 standard. In half-duplex modulation schemes and older duplex modulation schemes that employ the same carrier frequency for both transmit and receive, it is easy to make both the transmit and receive buffer sizes a multiple of the carrier period and symbol period. However, V.34 supports several combinations of carrier frequencies and symbol rates for signals traveling in both directions. Depending on line conditions, a different carrier may be used in one direction than in another. The sampling rate of the A/D and D/A in the CODEC, however, is usually the same. Therefore, the data, again samples of the analog waveform, are being transmitted between the CODEC and the host at the same frequency rate for both transmit and receive. In the '830 patent, the size of the buffers are based on an integral multiple of the carrier period and the symbol period. Since the samples are being transmitted and received at the same rate, it may be difficult to make the buffer size an integral multiple of both the transmit carrier frequency and the receive carrier frequency. This HSP modem would require many buffer sizes based on which combination of modulation scheme, carrier frequency and baud frequency is being used. For flexible application of this configuration, one would need to be able to changes sizes or include several different buffers to accommodate different modulation schemes. This would be impractical in most applications.
This prior art HSP modem further includes an interrupt circuit sending an interrupt signal from the receive buffer to the processor each time a frame of samples has been received and is ready for transfer to the host processor. As a result, each time a frame of samples is sent to the receiving buffer, an interrupt signal is sent to the host processor. Thus, the processor must constantly receive the interrupts, regardless of whether the host processor is ready to receive samples. This configuration would necessarily burden the host processors with a large number of interrupts to which it must respond. In the event that the processor does not respond, the transferred frames of samples may be partially or fully overwritten with incoming samples from the CODEC and lost. Moreover, since the echo cancellation must be continuous, the lost samples can cause problems when the echo subtraction in the echo cancellation scheme is not kept synchronous with the incoming signal flow. As a result, this configuration requires extensive logic in the HSP in order to account for the lost samples while performing the echo cancellation procedures. Even if it is kept synchronous with the signal flow, this still does not solve the problem of lost samples. If it persists, excessive noise can occur and ultimately failure of a communication link.
Therefore, there exists a need for a new modem configuration that conforms with the V.34 and V.90 recommendations and that better handles samples lost as a result of overflows and underflows occurring in the buffers. As will be seen below, the invention accomplishes this in a simple and elegant manner.